Parliament Replies Detail Design-Linked Incentive Scale as Semicon 2.0 Takes Shape
A source capture supporting an article in The Chitragupta Chronicle.
Captured · 4 documentsWhat is preserved
The source documents returned at the capture time have been retained privately (HTML, readable text or PDF). This is a webpage capture, not a complete copy of the publisher’s media or a platform export.
Visit the source · sansad.in ↗AU770_gkMVeo.pdf
Captured 18/9/2026, 12:15:43 am · application/pdf
SHA-256: c4473aab3a398930abfa173f0e634a0d3f499c9ab9c409a37b9d495198551efc
AU1879_bHLoId.pdf
Captured 18/9/2026, 12:15:43 am · application/pdf
SHA-256: c783ab160ce9f417485c16e377eea6d68345d55fa77a5437497aaa0c10c291ab
doc202627782101.pdf
static.pib.gov.in · Original source ↗
Captured 18/9/2026, 12:15:44 am · application/pdf
SHA-256: bab67db6570efe126b70fdb91819610dad824c7caa67cbcd05aa95462140af83
AU2066_I65V8H.pdf
Captured 18/9/2026, 12:15:44 am · application/pdf
SHA-256: 043679bbfcdf789b340d40158689c6bb19fd4e2759e1890cbcec06757c398bc6
Capture integrity
SHA-256: c4473aab3a398930abfa173f0e634a0d3f499c9ab9c409a37b9d495198551efc
A matching hash confirms that captured bytes have not changed. It does not establish that the publisher’s claims are true or that the page had this content before the capture date.
Limits of this record
Research coverage: every captured source is a government document - three Lok Sabha replies and one Press Information Bureau backgrounder. No independent chip-design employment data, disbursement ledgers, industry interviews or EDA/IP licensing contracts were captured, so the design push cannot be externally checked. A capture log notes some candidate sources were inaccessible or outside supported research domains.
Topic mismatch: the discovery title frames the story as India taking over global chip design and launching Semicon 2.0. No captured passage addresses global design market share, export performance for chip design services, or any 'taking over' of global design activity. The brief is confined to what the documents state.
All performance figures cited (24 projects, 16 tape-outs, fabricated chip counts, 67,000 trained, institution counts, Rs 900 crore project value) originate from government replies and a government backgrounder. They are programme self-reports, not independently audited results.
The documents differ on some counts: institution access is given as 315 in one reply and 397 universities and startups in the PIB backgrounder; fabricated chips are given as 7 in one reply and six in the backgrounder. The reasons for the discrepancies are not explained in the captured material.
The PIB backgrounder's 2026-27 targets (30 design companies, 10 IP cores, 200 design engineers) are planned outcomes, not completed results, and no verification of prior targets or disbursement against them is available in the sources.
Semicon 2.0's disbursing authority, disbursement process and eligibility criteria for design startups are not specified in the captured passages. The Lok Sabha reply on DLI 2.0 notes questions about pari-passu funding and matching private capital but does not provide the scheme's final eligibility rules.
No evidence of disagreement between the sources was found beyond the count discrepancies noted; this does not establish consensus, only that no conflicting document was captured.
No media candidates were supplied for this article.
Some candidate sources were inaccessible or outside the supported research domains; consult the capture log.
The original file is retained for editorial reference. Reproduction rights have not been established, so the raw capture is not publicly redistributed.